The oneAPI Software Abstraction for Heterogeneous Computing
oneAPI is a cross-industry, open, standards-based unified programming model. The oneAPI specification extends existing developer programming models to enable a diverse set of hardware through language, a set of library APIs, and a low-level hardware interface to support cross-architecture programming. It builds upon industry standards and provides an open, cross-platform developer stack to improve productivity and innovation. At the core of oneAPI is the DPC++ programming language, which builds on the ISO C++ and Khronos SYCL standards. DPC++ provides explicit parallel constructs and offload interfaces to support a broad range of accelerators. In addition to DPC++, oneAPI also provides libraries for compute- and data-intensive domains, e.g.: deep learning, scientific computing, video analytics, and media processing. Finally, a low-level hardware interface defines a set of capabilities and services to allow a language runtime system to effectively utilize a hardware accelerator.
Speaker(s)
Zheming Jin
I finished my Ph.D. in Computer Science and Engineering at University of South Carolina, where my research focused on program synthesis and applications development targeting FPGAs. As a postdoctoral appointee at Argonne, I evaluated high-level synthesis and oneAPI on FPGAs and GPUs, respectively. My research focus is heterogeneous computing.
Aksel Alpay
Aksel Alpay is a researcher and software engineer from Heidelberg University, where he works on high performance computing topics. In particular, he is the creator and lead developer of the hipSYCL SYCL implementation, and also engages within the Khronos SYCL working group to advance the language.
Kumudha Krishnamurthy Narasimhan
Kumudha Narasimhan is a Senior Software Engineer at Codeplay. Her work focuses on optimizing compilers and middleware to provide performance and portability on various heterogenous compute systems. She joined Codeplay in 2019 and has worked on many projects in this space – adding Nvidia backend for Intel oneMKL & oneDNN and optimizing various neural networks using glow compiler for proprietary custom hardware, to highlight a few. She presently leads the team which focuses on optimizing AI and DNN computations for different architectures. Prior to Codeplay, she received her Masters in Computer Science from Indian Institute of Science (India) where she worked on a domain specific language to optimize linear algebra computations and multigrid methods using polyhedral compilation techniques.
Ronan Keryell
Ronan Keryell is principal software engineer at Xilinx Research Labs. He works on SYCL C++-based programming models for heterogeneous system like FPGA and CGRA. He is the specification editor of the SYCL standard, member of the SYCL, SPIR & OpenCL standard committees from Khronos Group & ISO C++ committee. Ronan Keryell received his MSc in Electrical Engineering and PhD in Computer Science in 1992 from École Normale Supérieure of Paris & University of Paris Sud (France), on the design of a massively parallel RISC-based VLIW-SIMD graphics computer and its programming environment. He was co-founder of 3 start-ups, mainly in high-performance computing, was the technical lead of the Par4All automatic parallelizer at SILKAN, targeting OpenMP, CUDA & OpenCL from sequential C & Fortran. Before joining Xilinx, he worked at AMD on programming models for GPU.
James Reinders
James Reinders is an engineer at Intel focused on enabling parallel programming in a heterogeneous world. James has helped create ten technical books related to parallel programming; his latest book is about SYCL (free download: https://www.apress.com/book/9781484255735). He has had the great fortune to help make key contributions to two of the world’s fastest computers (#1 on Top500 list) as well as many other supercomputers, and software developer tools.
