Performance Portability: From Fantasy to Reality

As we go through what many in high performance computing are calling a “Cambrian Explosion” of hardware architectures, what we would ideally like to be able to do is write software once and achieve maximum performance on all these new innovative platforms. We know that this ideal is not possible. However, we are making rapid progress towards achieving a level of performance portability that’s close enough to maximum performance while requiring relatively minimal effort to bring to new processor architectures. Managing this balance of productivity, performance and portability requires finding reasonable compromises between each. This talk is going to go through many of the most successful approaches and what trade-offs are required to deliver these into production. This talk will cover performance portability technologies using C++, SYCL, AI and various compiler technologies like MLIR.

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June 26, 2025

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