SYCL*, a standards-based unified programming model, offers ground-breaking performance across different hardware targets, including CPUs, GPUs, and FPGAs. However, to achieve maximum performance from the SYCL* workloads running on various platforms, we need to ensure maximum utilization of Hardware resources and Software capabilities. Profilers can play a significant role in harnessing the maximum computational power and memory bandwidth of the target Hardware. In this session, we will demonstrate the utility of using a profiler to easily tune your oneAPI or SYCL based application by pinpointing bottlenecks and mapping them to source code, and ultimately optimizing the performance based on recommendations of the profiler. The demonstration will use Intel® VTune™ Profiler as an example.