Accelerating Graph Analytics with oneAPI and Intel FPGAs
There is a need to accelerate graph processing through specialized techniques and hardware in order to improve analytical throughput due to ever increasing data sizes. The oneAPI toolkit for FPGAs is used to create minimum-spanning-tree (MST) and breadth-first search (BFS) accelerators. Results showcase BFS performance up to 75 million traversed edges per second, achieving up to 3.0× speedup over the Intel Xeon 6128 CPU baseline. Despite falling short of related HDL designs, this research uses 5.85× fewer lines of code. MST designs display speedups of ∼1.5× when compared to the CPU baseline.
Speaker(s)
James Bickerstaff - SHREC & University of Pittsburgh/ PhD Student
James Bickerstaff received his BS in computer engineering from the University of Pittsburgh in December 2021 and is now a second year PhD student. He is a member of the NSF Center for Space, High-performance, and Resilient Computing (SHREC) research lab. His primary research focus is accelerating high-throughput applications using FPGAs with oneAPI.
